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Why Won't My CP1L Interrupt Inputs Work Correctly?


Why Won't My CP1L Interrupt Inputs Work Correctly?
This article provides basic configuration information for typical operation of the CP1L interrupt functions.
Introduction
The CP1L CPU can be temporarily interrupted from its normal cyclical processing for high priority operations. There are 4 interrupt functions:
1. Direct Mode Input Interrupts
2. Counter Mode Input Interrupts
3. Scheduled Interrupts
4. High-speed Counter Interrupts
 
Common issues related to the improper operation of Interrupt Inputs are:
- Improper PLC Setup (see note below)
- Incorrect wiring to the physical input terminal
- Improper implementation of the MSKS instruction in the PLC program
 
NOTE: Cycle power to the CPU after changing any PLC Setup values via CX-Programmer to ensure they take effect.
 
See the CP1L CPU Operation Manual (Cat. No. W462) for more detail and examples for operation and configuration of the CP1L interrupt inputs (attached).
Content
Direct Mode Input Interrupts
 
When one of the CPU Unit’s built-in inputs goes from OFF to ON (or ON to OFF), the corresponding interrupt task is executed. Interrupt tasks 140 to 145 are allocated to the 8 input terminals used for the input interrupts.
 
 
The basic procedure for configuring a Direct Mode Input Interrupt is shown below.
 

 
Complete configuration details and programming examples can be found in the attached manual CP1L CPU Operation Manual (Cat. No. W462).
 
 
Counter Mode Input Interrupts
This function counts input pulses at one of the CPU Unit’s built-in inputs and executes the corresponding interrupt task when the count reaches the SV.
The maximum input response frequency for input interrupts (in counter mode) is 5 kHz.
 
The basic procedure for configuring a Counter Mode Interrupt Input is shown below.
 

 
Complete configuration details and programming examples can be found in the attached manual CP1L CPU Operation Manual (Cat. No. W462).
 
 
Scheduled Interrupts
 
This function executes an interrupt task at a fixed time interval measured by the CPU Unit’s built-in timer. The time interval units can be set to 10 ms, 1 ms, or 0.1 ms. The minimum timer SV is 0.5 ms. Interrupt task 2 is allocated to scheduled interrupt.
 
The basic procedure for configuring a Scheduled Interrupt is shown below:
 

 
Complete configuration details and programming examples can be found in the attached manual CP1L CPU Operation Manual (Cat. No. W462).
 
 
High Speed Counter Inputs
This function counts input pulses with the CPU Unit’s built-in high-speed counter and executes an interrupt task when the count reaches the preset value or falls within a preset range (target-value or zone comparison). An interrupt task between 0 and 255 can be allocated with an instruction.
 
The basic procedure for configuring a Scheduled Interrupt is shown below:

Complete configuration details and programming examples can be found in the attached manual CP1L CPU Operation Manual (Cat. No. W462).

 

Summary
The CP1L has 4 types of Interrupt Input Functions that require unique configuration and programming for proper operation. This article serves as a basic guide and more detail and programming examples can be found in the attached manual in Section 6-1, Interrupt Functions.

 



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Created 2008-09-11
Modified 2013-12-17
Views 6474

 

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